1. Field of the Invention
The present invention relates to a manufacturing method for a solid-state image sensor.
2. Description of the Related Art
Patent Document 1 (Japanese Patent Laid-Open No. 11-126893) discloses a photodiode, for configuring a solid-state image sensor, that includes a P-type charge storage layer and an N-type depletion prevention layer disposed thereupon. In order to form the stated P-type charge storage layer, a P-type semiconductor substrate is first implanted with boron ions, and is then heat-treated at a temperature of 800-1000° C. for approximately 30 minutes in a nitrogen atmosphere. Meanwhile, in order to form the stated N-type depletion prevention layer, a P-type semiconductor substrate is first implanted with phosphorous ions, and is then heat-treated at a temperature of 800-1000° C. for approximately 30 minutes in a nitrogen atmosphere. Patent Document 1 discloses that Rapid Thermal Annealing (RTA) may be used in the heat treatments following the stated boron implantation and phosphorous implantation.
Patent Document 2 (Japanese Patent Laid-Open No. 2001-257339), meanwhile, discloses a manufacturing method for a solid-state image sensor in which an RTA process for activating impurities is performed after each step of impurity ion implantation is completed. In Patent Document 2, electrons are used as the carrier of the signal charge.
Patent Document 3 (Japanese Patent Laid-Open No. 2008-60356) discloses a solid-state image sensor in which an antireflection layer is disposed on the light-receiving surface of an embedded photodiode in which a first conductivity type semiconductor region and a second conductivity type semiconductor region are layered. The antireflection layer can be formed using a layered structure containing SiN and SiO.
When the charge storage region of a photodiode (PD) is formed through ion implantation, the following step of implanting ions of the opposite conductivity type in the surface region thereof causes crystal defects to occur in the surface region and the charge storage region.
If CVD is further used to form an antireflection film upon the PD surface, the semiconductor substrate is heated at a temperature of less than 800° C. for an extended period of time during the application of CVD; therefore, the impurity ions that form the surface region undergo enhanced diffusion due to interaction with the crystal defects within the surface region and the charge storage region. This phenomenon is known to appear dramatically at low temperatures. The reason for this is that the recovery rate of crystal defects is slower at low temperatures than at high temperatures, and thus the enhanced diffusion occurs for a longer amount of time.
It is necessary for the charge storage region of a solid-state image sensor to store at least a desired number of electrons or holes. If enhanced diffusion causes a high-concentration surface region to diffuse toward the interior of the semiconductor substrate, the concentration of the charge storage region will suddenly drop, causing an extreme decrease in the ability to store electrons or holes. In solid-state image sensors, such a decrease in ability causes the saturation characteristics to degrade.
Patent Document 1 discloses that the heat treatments following the implantation of boron or the implantation of phosphorous may, depending on the situation, be carried out through RTA, but does not disclose specific conditions for using RTA.
Meanwhile, although Patent Document 2 discloses performing an RTA process each time a step of implanting impurity ions of each conductivity type is completed, Patent Document 2 similarly does not disclose specific conditions for using RTA.
Furthermore, while increasing the concentration of the charge storage region at the time of ion implantation can be considered as a different measure with respect to the aforementioned abnormal diffusion, such a method causes an increase in the voltage applied to the gate of a MOS transistor adjacent to the PD when transferring the charge stored in the MOS transistor.
A rise in the voltage for charge transfer is fatal particularly in CMOS solid-state image sensors, which are driven at lower voltages than CCDs. Balancing low-voltage driving and sufficient saturation characteristics is an essential issue for CMOS solid-state image sensors, an issue that becomes even more important as pixel dimensions decrease.